Field of the Invention
This invention relates to integrated circuit current mirror circuits, and more particularly to current mirrors with means for compensating for the effects of current leakages to the circuit substrate.
Description of the Prior Art
It is often required, especially in bias current cancellation circuits, that very accurate low current sources be generated within an intergrated circuit. This is conventionally achieved by the use of a "current mirror" composed of lateral PNP transistors. A problem with this approach is that lateral PNP transistors of the standard bipolar type exhibit base leakage currents to the substrate which cause inaccuracies and even complete malfunction at high temperatures.
A conventional type of current mirror circuit is shown in FIG. 1. A two-stage current mirror is shown, the second stage being employed to greatly increase the output impedance of the mirror in order to limit changes in output current with changes in output termination voltage. The first stage consists of a current reference transistor Q1 which is matched and has a common base connection with a pair of slave transistors Q2 and Q3. The second stage is formed in a similar manner, with a current reference transistor Q4 matched and having a common base connection with slave transistors Q5 and Q6. The collector-emitter circuits Q4, Q5 and Q6 are connected respectively in circuit with the collector-emitter circuits of Q1, Q2 and Q3.
An NPN current source transistor Q7 has its collector-emitter circuit connected to the collector of Q4, and is biased so as to produce a desired reference current I1 which is directed through Q4 and Q1. (With a single stage current mirror Q7 would be connected directly to Q1.) The emitters of first stage transistors Q1, Q2 and Q3 are all connected in common to a positive voltage source bus, while the collectors of Q5 and Q6 provide output currents I2 and I3 which mirror I1. The circuit is shown as having two outputs, but additional outputs could be added by providing additional slave transistor pairs in the same manner as Q2/Q5 and Q3/Q6.
Current supply transistors Q8 and Q9 are provided respectively in the first and second stages to supply the base and leakage currents of the reference and slave transistors. With the exception of Q7, all of the transistors described are of the PNP type. The emitter of Q8 is connected to the common base connection of Q1, Q2, Q3, its collector is connected to a negative voltage supply terminal, and its base is connected to the collector of Q1; Q9 is similarly connected in the second stage of Q4, Q5 and Q6.
In the integrated circuit implementation of bipolar transistors such as Q1-Q9 on a substrate, each of the transistors is characterized by a base-to-substrate leakage current (I.sub.L). Neglecting the leakage currents and the base currents of Q8 and Q9, and assuming that Q1-Q6 are identical (i.e., that they have the same current gain and base-emitter voltage at a given current), then the collector current of Q4 will be equal to I1, and the collector current of Q1 will be equal to I1 (1+1/b), where b is the PNP current gain. Since Q1, Q2 and Q3 are identical, Q2 and Q3 will also have collector currents equal to I1 (1+1/b). Q4, Q5 and Q6 are also identical, so that their collector currents are also equal; hence, I1=I2=I3.
The presence of Q8 and Q9 causes a small error in the current matching between the slave and reference transistors. However, this error is inversely proportional to b.sup.2, and with a typical b of about 50 for PNP transistors can be neglected. A more serious problem occurs due to the base-substrate leakage of the PNP transistors, modeled as I.sub.L current sources in FIG. 1. At low temperatures this leakage current may be only a few picoamps and unlikely to cause problems, but at high temperatures of about 125.degree. C. I.sub.L is about 1 to 2 nanoamps.
The emitter current of Q8 is equal to the combined base currents of Q1, Q2 and Q3, while the emitter current of Q9 is equal to the combined base currents of Q4, Q5 and Q6, or about 3 I.sub.1 /b in both cases. Since there are 3 base-substrate current leakages at the emitters of Q8 and Q9, the emitter currents of those transistors become negative if the leakage current is greater than I.sub.1 /b. This turns Q8 and Q9 off, and the current mirror no longer functions. In this event the output currents I2 and I3 are approximately equal to bI.sub.L, and are not controlled by I1. Taking typical values for I.sub.L of 2 nanoamps and for b of 50, this turn-off situation occurs when I1 is less than 100 nanoamps.
Even if Q8 and Q9 do not turn off, their base leakage currents will cause errors at the collectors of reference current transistors Q1 and Q4. The overall error in I2 and I3 will be about 2I.sub.L /I1, or about 4% when I.sub.L equals 2 nanoamp and I1 equals 100 nanoamps. The base leakage current of current source Q7 introduces a further error.